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Cypress Semiconductor /psoc63 /SAR /CHAN_CONFIG[10]

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Interpret as CHAN_CONFIG[10]

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0POS_PIN_ADDR 0 (SARMUX)POS_PORT_ADDR 0 (DIFFERENTIAL_EN)DIFFERENTIAL_EN 0 (AVG_EN)AVG_EN 0SAMPLE_TIME_SEL 0NEG_PIN_ADDR 0 (SARMUX)NEG_PORT_ADDR 0 (NEG_ADDR_EN)NEG_ADDR_EN 0 (DSI_OUT_EN)DSI_OUT_EN

POS_PORT_ADDR=SARMUX, NEG_PORT_ADDR=SARMUX

Description

Channel configuration register.

Fields

POS_PIN_ADDR

Address of the pin to be sampled by this channel (connected to Vplus)
POS_PORT_ADDR

Address of the port that contains the pin to be sampled by this channel (connected to Vplus)

0 (SARMUX): SARMUX pins.

1 (CTB0): CTB0

2 (CTB1): CTB1

3 (CTB2): CTB2

4 (CTB3): CTB3

5 (AROUTE_VIRT2): AROUTE virtual port2 (VPORT2)

6 (AROUTE_VIRT1): AROUTE virtual port1 (VPORT1)

7 (SARMUX_VIRT): SARMUX virtual port (VPORT0)
DIFFERENTIAL_EN

Differential enable for this channel. If NEG_ADDR_EN=0 and this bit is 1 then POS_PIN_ADDR[0] is ignored and considered to be 0, i.e. POS_PIN_ADDR points to the even pin of a pin pair. In that case the even pin of the pair is connected to Vplus and the odd pin of the pair is connected to Vminus. POS_PORT_ADDR is used to identify the port that contains the pins.

  • 0: The voltage on the addressed pin is measured (Single-ended) and the resulting value is stored in the corresponding data register.
  • 1: The differential voltage on the addressed pin pair is measured and the resulting value is stored in the corresponding data register. (if NEG_ADDR_EN=0 then POS_PIN_ADDR[0] is ignored).
AVG_EN

Averaging enable for this channel. If set the AVG_CNT and AVG_SHIFT settings are used for sampling the addressed pin(s)
SAMPLE_TIME_SEL

Sample time select: select which of the 4 global sample times to use for this channel
NEG_PIN_ADDR

Address of the neg pin to be sampled by this channel.
NEG_PORT_ADDR

Address of the neg port that contains the pin to be sampled by this channel.

0 (SARMUX): SARMUX pins.

5 (AROUTE_VIRT2): AROUTE virtual port2 (VPORT2)

6 (AROUTE_VIRT1): AROUTE virtual port1 (VPORT1)

7 (SARMUX_VIRT): SARMUX virtual port (VPORT0)
NEG_ADDR_EN

1 - The NEG_PIN_ADDR and NEG_PORT_ADDR determines what drives the Vminus pin. This is a variation of differential mode with no even-odd pair limitation 0 - The NEG_SEL determines what drives the Vminus pin.
DSI_OUT_EN

DSI data output enable for this channel.

  • 0: the conversion result for this channel is only stored in the channel data register and the corresponding CHAN_DATA_VALID bit is set.
  • 1: the conversion result for this channel is stored in the channel data register and the corresponding CHAN_DATA_VALID bit is set. The same data (same formating), together with the channel number, is sent out on the DSI communication channel for processing in UDBs.

Links

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Register License

Copyright 2016-2018 Cypress Semiconductor Corporation \n Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License.
You may obtain a copy of the License at \n
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and
limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data